View FDS6984SF011_6912564.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

september 2000 ? 2000 fairchild semiconductor corporation fds6984s rev c(w) fds6984s dual notebook power supply n - channel powertrench ? ? ? ? syncfet ? general description the fds6984s is designed to replace two single so-8 mosfets and schottky diode in synchronous dc:dc power supplies that provide various peripheral voltages for notebook computers and other battery powered electronic devices. fds6984s contains two unique 30v, n-channel, logic level, powertrench mosfets designed to maximize power conversion efficiency. the high-side switch (q1) is designed with specific emphasis on reducing switching losses while the low- side switch (q2) is optimized to reduce conduction losses. q2 also includes an integrated schottky diode using fairchild?s monolithic syncfet technology. features ? q2 : optimized to minimize conduction losses includes syncfet schottky diode 8.5a, 30v r ds(on) = 19 m ? = @ v gs = 10v r ds(on) = 28 m ? = @ v gs = 4.5v ? q1 : optimized for low switching losses low gate charge ( 5 nc typical) 5.5a, 30v r ds(on) = 0.040 ? = @ v gs = 10v r ds(on) = 0.055 ? = @ v gs = 4.5v s2 so-8 g2 s1 g1 d2 d2 d1 d1 4 3 2 1 5 6 7 8 q1 q2 absolute maximum ratings t a = 25c unless otherwise noted symbol parameter q2 q1 units v dss drain-source voltage 30 30 v v gss gate-source voltage 20 20 v i d drain current - continuous (note 1a) 8.5 5.5 a - pulsed 30 20 p d power dissipation for dual operation 2 w power dissipation for single operation (note 1a) 1.6 (note 1b) 1 (note 1c) 0.9 t j , t stg operating and storage junction temperature range -55 to +150 c thermal characteristics r ja thermal resistance, junction-to-ambient (note 1a) 78 c/w r jc thermal resistance, junction-to-case (note 1) 40 c/w package marking and ordering information device marking device reel size tape width quantity fds6984s fds6984s 13? 12mm 2500 units fds6984s
fds6680s rev c (w) electrical characteristics t a = 25c unless otherwise noted symbol parameter test conditions type min typ max units off characteristics v gs = 0 v, i d = 1 ma q2 30 bv dss drain-source breakdown voltage v gs = 0 v, i d = 250 a q1 30 v i dss zero gate voltage drain current v ds = 24 v, v gs = 0 v q2 q1 500 1 a i gssf gate-body leakage, forward v gs = 20 v, v ds = 0 v all 100 na i gssr gate-body leakage, reverse v gs = -20 v, v ds = 0 v all -100 na on characteristics (note 2) v gs(th) gate threshold voltage v ds = v gs , i d = 1 ma v ds = v gs , i d = 250 a q2 q1 1 1 3 3 v i d = 1 ma, referenced to 25 c q2 -6 ? v gs(th) === ? t j gate threshold voltage temperature coefficient i d = 250 ua, referenced to 25 c q1 -4 mv/ c v gs = 10 v, i d = 8.5 a v gs = 10 v, i d = 8.5 a, t j = 125 c v gs = 4.5 v, i d = 7 a q2 16 24 23 19 32 28 r ds(on) static drain-source on-resistance v gs = 10 v, i d = 5.5 a v gs = 10 v, i d = 5.5 a, t j = 125 c v gs = 4.5 v, i d = 4.6 a q1 35 53 48 40 60 55 m ? i d(on) on-state drain current v gs = 10 v, v ds = 5 v q2 q1 30 20 a g fs forward transconductance v ds = 5 v, i d = 8.5 a v ds = 5 v, i d = 5.5 a q2 q1 26 40 s dynamic characteristics c iss input capacitance q2 q1 1233 462 pf c oss output capacitance q2 q1 344 113 pf c rss reverse transfer capacitance v ds = 15 v, v gs = 0 v, f = 1.0 mhz q2 q1 106 40 pf switching characteristics (note 2) t d(on) turn-on delay time q2 q1 8 10 16 18 ns t r turn-on rise time q2 q1 5 14 10 25 ns t d(off) turn-off delay time q2 q1 25 21 40 34 ns t f turn-off fall time v dd = 15 v, i d = 1 a, v gs = 10v, r gen = 6 ? q2 q1 11 7 20 14 ns q g total gate charge q2 q1 11 8.5 16 12 nc q gs gate-source charge q2 q1 5 2.4 nc q gd gate-drain charge q2 v ds = 15 v, i d = 8.5 a, v gs =5v q1 v ds = 15 v, i d = 5.5 a, v gs = 5 v q2 q1 4 3.1 nc fds6984s
fds6680s rev c (w) electrical characteristics (continued) t a = 25c unless otherwise noted symbol parameter test conditions type min typ max units drain?source diode characteristics and maximum ratings i s maximum continuous drain-source diode forward current q2 q1 3.0 1.3 a t rr reverse recovery time 17 ns q rr reverse recovery charge i f = 10a, d if /d t = 300 a/s (note 3) q2 12.5 nc v sd drain-source diode forward voltage v gs = 0 v, i s = 3.5 a (note 2) v gs = 0 v, i s = 1.3 a (note 2) q2 q1 0.5 0.74 0.7 1.2 v notes: 1. r ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the so lder mounting surface of the drain pins. r jc is guaranteed by design while r ca is determined by the user's board design. a) 78c/w when mounted on a 0.5in 2 pad of 2 oz copper b) 125c/w when mounted on a 0.02 in 2 pad of 2 oz copper c) 135c/w when mounted on a minimum pad. scale 1 : 1 on letter size paper 2. see ?syncfet schottky body diode characteristics? below. 3. pulse test: pulse width < 300 s, duty cycle < 2.0% fds6984s
fds6680s rev c (w) typical characteristics: q2 0 10 20 30 40 50 0123 v ds , drain-source voltage (v) 5.0v 4.5v 4.0v 3.5v v gs = 10v 6.0v 0.6 1 1.4 1.8 2.2 2.6 0 1020304050 i d , drain current (a) v gs = 4.0v 6.0v 8.0v 10v 5.0v 4.5v figure 1. on-region characteristics. figure 2. on-resistance variation with drain current and gate voltage. 0.4 0.7 1 1.3 1.6 1.9 -50 -25 0 25 50 75 100 125 150 t j , junction temperature ( o c) i d = 10a v gs = 10v 0 0.01 0.02 0.03 0.04 0.05 0.06 246810 v gs , gate to source voltage (v) i d = 5a t a = 125 o c t a = 25 o c figure 3. on-resistance variation with temperature. figure 4. on-resistance variation with gate-to-source voltage. 0 10 20 30 40 50 1.5 2.5 3.5 4.5 5.5 v gs , gate to source voltage (v) t a = -55 o c 25 o c 125 o c v ds = 5v 0.001 0.01 0.1 1 10 0 0.2 0.4 0.6 0.8 v sd , body diode forward voltage (v) t a = 125 o c 25 o c -55 o c v gs = 0v figure 5. transfer characteristics. figure 6. body diode forward voltage variation with source current and temperature. fds6984s
fds6680s rev c (w) typical characteristics: q2 0 2 4 6 8 10 036912151821 q g , gate charge (nc) i d =10a v ds = 5v 15v 10v 0 400 800 1200 1600 2000 0 5 10 15 20 25 30 v ds , drain to source voltage (v) c iss c rss c oss f = 1mhz v gs = 0 v figure 7. gate charge characteristics. figure 8. capacitance characteristics. 0.01 0.1 1 10 100 0.1 1 10 100 v ds , drain-source voltage (v) dc 10s 1s 100ms 100 ja = 135 o c/w t a = 25 o c 10ms 1ms 0 10 20 30 40 50 0.001 0.01 0.1 1 10 100 1000 t 1 , time (sec) single pulse r ja = 135c/w t a = 25c figure 9. maximum safe operating area. figure 10. single pulse maximum power dissipation. fds6984s
fds6680s rev c (w) typical characteristics q1 0 10 20 30 40 012345 v ds , drain-source voltage (v) 4.0v 3.0 3.5v 4.5 v gs = 10v 5.0 6.0 0.5 1 1.5 2 2.5 3 0102030 i d , drain current (a) v gs = 3.0v 4.0v 3.5v 10v 4.5v 5.0v 6.0v figure 11. on-region characteristics. figure 12. on-resistance variation with drain current and gate voltage. 0.6 0.8 1 1.2 1.4 1.6 1.8 -50 -25 0 25 50 75 100 125 150 t j , junction temperature ( o c) i d = 4.6a v gs = 10v 0 0.05 0.1 0.15 0.2 2.533.544.55 v gs , gate to source voltage (v) i d = 2.3 a t a = 125 o c t a = 25 o c figure 13. on-resistance variation with temperature. figure 14. on-resistance variation with gate-to-source voltage. 0 5 10 15 20 25 12345 v gs , gate to source voltage (v) t a = -55 o c 25 o c 125 o c v ds = 5v 0.001 0.01 0.1 1 10 100 0 0.2 0.4 0.6 0.8 1 1.2 1.4 v sd , body diode forward voltage (v) t a = 125 o c 25 o c -55 o c v gs = 0v figure 15. transfer characteristics. figure 16. body diode forward voltage variation with source current and temperature. fds6984s
fds6680s rev c (w) typical characteristics q1 0 2 4 6 8 10 0246810 q g , gate charge (nc) i d = 4.6a v ds = 5v 15v 10v 0 100 200 300 400 500 600 700 0 5 10 15 20 25 30 v ds , drain to source voltage (v) c iss c rss c oss f = 1mhz v gs = 0 v figure 17. gate charge characteristics. figure 18. capacitance characteristics. 0.01 0.1 1 10 100 0.1 1 10 100 v ds , drain-source voltage (v) dc 10s 1s 100ms r ds(on) limit v gs = 10v single pulse r ja = 135 o c/w t a = 25 o c 10ms 1ms 100s 0 10 20 30 0.01 0.1 1 10 100 t 1 , time (sec) single pulse r ja = 135c/w t a = 25c figure 19. maximum safe operating area. figure 20. single pulse maximum power dissipation. 0.0001 0.001 0.01 0.1 1 10 100 300 0.001 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1 t , time (s ec) tran sien t t hermal resistance r(t) , no rmalized effective 1 single pulse d = 0.5 0. 1 0.05 0.02 0.01 0. 2 duty cycle, d = t /t 1 2 r (t) = r(t) * r r = 135 c/w ja ja ja t - t = p * r (t) ja a j p(p k ) t 1 t 2 figure 21. transient thermal response curve. thermal characterization performed using the conditions described in note 1c. transient thermal response will change depending on the circuit board design. fds6984s
fds6680s rev c (w) typical characteristics (continued) syncfet schottky body diode characteristics fairchild?s syncfet process embeds a schottky diode in parallel with powertrench mosfet. this diode exhibits similar characteristics to a discrete external schottky diode in parallel with a mosfet. figure 22 shows the reverse recovery characteristic of the fds6984s. figure 22. fds6984s syncfet body diode reverse recovery characteristic. for comparison purposes, figure 23 shows the reverse recovery characteristics of the body diode of an equivalent size mosfet produced without syncfet (fds6690a). figure 23. non-syncfet (fds6690a) body diode reverse recovery characteristic. schottky barrier diodes exhibit significant leakage at high temperature and high reverse voltage. this will increase the power in the device. 0.00001 0.0001 0.001 0.01 0.1 0 10 20 30 v ds , reverse voltage (v) i dss , reverse le akage current (a) 125 o c 25 o c figure 24. syncfet body diode reverse leakage versus drain-source voltage and temperature. 10ns/div 3a/div fds6984s 10ns/div 3a/div 0v
soic-8 (fs pkg code s1) 1 : 1 scale 1:1 on letter size paper di me n si o n s s h ow n be l ow a re in : inches [millimeters] part weight per unit (gram): 0.0774 soic-8 package dimensions september 1998, rev. a 9 ?2000 fairchild semiconductor international
soic(8lds) packaging configuration: figure 1.0 components leader tape 1680mm minimum or 210 empty pockets trailer tape 640mm minimum or 80 empty pockets soic(8lds) tape leader and trailer configuration: figure 2.0 cover tape carrier tape note/comments packaging option soic (8lds) packaging information standard (no flow code) l86z f011 packaging type reel size tnr 13" dia rail/tube - tnr 13" dia qty per reel/tube/bag 2,500 95 4,000 box dimension (mm) 343x64x343 530x130x83 343x64x343 max qty per box 5,000 30,000 8,000 d84z tnr 7" dia 500 184x187x47 1,000 weight per unit (gm) 0.0774 0.0774 0.0774 0.0774 weight per reel (kg) 0.6060 - 0.9696 0.1182 f63tn label esd label 343mm x 342mm x 64mm standard intermediate box esd label f63tnr label sample f63tnlabel lot: cbvk741b019 fsid: fds9953a d/c1: d9842 qty1: spec rev: spec: qty: 2500 d/c2: qty2: cpn: n/f: f (f63tnr)3 f 852 nds 9959 soic-8 unit orientation f 852 nds 9959 pin 1 static dissipative embossed carrier tape
? 1998 fairchild semiconductor corporation dimensions are in millimeter pkg type a0 b0 w d 0 d1 e1 e2 f p1 p0 k0 t wc tc soic (8lds) (12mm) 6.50 +/-0.10 5.30 +/-0.10 12.0 +/-0.3 1.55 +/-0.05 1.60 +/-0.10 1.75 +/-0.10 10.25 min 5.50 +/-0.05 8.0 +/-0.1 4.0 +/-0.1 2.1 +/-0.10 0.450 +/- 0.150 9.2 +/-0.3 0.06 +/-0.02 p1 a0 d1 p0 f w e1 d0 e2 b0 tc wc k0 t dimensions are in inches and millimeters tape size reel option dim a dim b dim c dim d dim n dim w1 dim w2 dim w3 (lsl-usl) 12mm 7" dia 7.00 177.8 0.059 1.5 512 +0.020/-0.008 13 +0.5/-0.2 0.795 20.2 2.165 55 0.488 +0.078/-0.000 12.4 +2/0 0.724 18.4 0.469 0.606 11.9 15.4 12mm 13" dia 13.00 330 0.059 1.5 512 +0.020/-0.008 13 +0.5/-0.2 0.795 20.2 7.00 178 0.488 +0.078/-0.000 12.4 +2/0 0.724 18.4 0.469 0.606 11.9 15.4 see detail aa dim a max 13" diameter option 7" diameter option dim a max see detail aa w3 w2 max measured at hub w1 measured at hub dim n dim d min dim c b min detail aa notes: a0, b0, and k0 dimensions are determined with respect to the eia/jedec rs-481 rotational and lateral movement requirements (see sketches a, b, and c). 20 deg maximum component rotation 0.5mm maximum 0.5mm maximum sketch c (top view) component lateral movement typical component cavity center line 20 deg maximum typical component center line b0 a0 sketch b (top view) component rotation sketch a (side or front sectional view) component rotation user direction of feed soic(8lds) embossed carrier tape configuration: figure 3.0 soic(8lds) reel configuration: figure 4.0 so ic -8 t ape and reel data, continued july 1999, rev. b
trademarks the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy fairchilds products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification p roduct status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. formative or in design first production full production not in production disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. qfet? qs? qt optoelectronics? quiet series? supersot?-3 supersot?-6 supersot?-8 syncfet? tinylogic? uhc? fastr? globaloptoisolator? gto? hisec? isoplanar? microwire? optologic? optoplanar? pop? powertrench ? rev. f1 acex? bottomless? coolfet? crossvolt? dome? e 2 cmos tm ensigna tm fact? fact quiet series? fast ? vcx?

▲Up To Search▲

Price & Availability of FDS6984SF011

	To Download FDS6984SF011 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .